Recently, the bipolar transistor is required of the lower power consumption, the lower parasitic capacitance, and the lower parasitic resistance.
FIG. 1 is the sectional view of the bipolar transistor in accordance with the conventional technique.
Referring to FIG. 1, the P-type semiconductor substrate is denoted as the reference number 1, the N.sup.+ -type buried region is denoted as the reference number 2, the N-type collector region is denoted as the reference number 3, the N.sup.+ -type sink region is denoted as the reference number 4, the P-type base region is denoted as the reference number 7, the N.sup.+ -type emitter region is denoted as the reference number 8, the dielectric films are denoted as the reference numbers 5, 6 and 10, respectively, and the metal electrodes are denoted as the reference number 9.
It is the metal electrodes to connect the emitter electrode, the base electrode, and the collector electrode to an emitter region 8, the base region 7, and the sink region 4, respectively.
The dielectric film 5 as described hereinabove is filled in the trench which is formed by a predetermined depth into the semiconductor substrate, and is separated or isolated between the elements, thereby reducing the size of elements as well as the junction area of the semiconductor substrate 1 and the buried region 2, and the parasitic connecting capacitance.
However, the bipolar transistor as described hereinabove has a problem that the power consumption of the bipolar transistor is high by increasing the parastic capacitance because the base region is widely connected to the emitter region of a high concentration, and the extrinsic base area is large.
FIG. 2 is the sectional view of the bipolar transistor fabricated by the conventional sidewall base contact method. It is described in U.S. patent application Ser. No. 443,554.
Referring now to FIG. 2, the reference numeral 13 denotes the N-type collector region, the reference numeral 17 denotes the base region, and the reference numeral 18 denotes N.sup.+ -type emitter region.
These regions 13, 17 and 18 as described hereinabove are the active regions of elements in which is provided on the piller 100 of a cylindrical type formed by the etching of the P-type semiconductor substrate 11. The reference numeral 12 denotes the N.sup.+ -type buried region formed in the semiconductor substrate, the reference numeral 15 denotes the N.sup.+ -type sink in which provided on the pillar 101 of another cylindrical type formed on the semiconductor substrate 11.
The dielectric film 16 is deposited on the pillars 100 and 101 overlaid on the etched semiconductor substrate 11, and the polysilicon base electrode 14 is formed, which is contacted to the side of base electrode 17 overlaid on the dielectric film 16.
Also, the reference numerals 98 and 99 denotes the dielectric films respectively, the reference numeral 20 denotes the electrode which can be used to the emitter electrode, the base electrode and the collector electrode, each of which is electrically connected to the emitter region 18, the polysilicon base electrode 14 and the sink 15.
The emitter region 18 and the collector region 13 of the bipolar transistor are narrowly jointed to the base region 17, and thus the backward characteristics is also enhanced.
When the bipolar transistor is backwardly operated as mentioned hereinabove, the emitter region 18 is operational as the collector region, and the collector region 13 is operational as the emitter region in the forward operation, respectively.
However, the conventional bipolar transistor as mentioned hereinabove has the larger contact surface in which the base region is contacted by the thickness of the polysilicon base electrode, and thus the operational characteristics of the transistor is down because the contact surface is wide, and the extrinsic region of the base is increased, and there is a problem that the power consumption of it is increased by the parasitic capacitance between the emitter region and the collector region, and the polysilicon base electrode.
The method for forming the constant high of the dielectric film and the base polysilicon electrode over the entire region except for the pillar is also a difficult problem.
It is also the difficult problem to form the emitter electrode over the emitter region because the emitter region is formed on the upper of the pillar of the small size without self-contact.